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Authors Title Journal Vol. No. Page Date
41 Gil Sung Lee, Doo-Hyun Kim, Seongjae Cho, and Byung-Gook Park A new 1T DRAM cell: cone type 1T DRAM cell IEICE Transactions on Electronics E94-C 5 681-685 May 2011
40 Seongjae Cho, Jung Hoon Lee, Sunghun Jung, Se Hwan Park, and Byung-Gook Park Fabrication and Operation Methods of a One-time Programmable (OTP) Nonvolatile Memory (NVM) Based on a Metal-oxide-semiconductor Structure Journal of the Korean Physical Society 58 5 1488-1493 May 2011
39 Seongjae Cho, Kyung Rok Kim, Byung-Gook Park, and In Man Kang RF Performance and Small-Signal Parameter Extraction of Junctionless Silicon Nanowire MOSFETs IEEE Transactions on Electron Devices 58 5 1388-1396 May 2011
38 Seongjae Cho, Won Bo Shim, Yoon Kim, Jang-Gn Yun, Jong Duk Lee, Hyungcheol Shin, Jong-Ho Lee, and Byung-Gook Park Charge-Trap Folded NAND Flash Memory Device with Band-gap-Engineered Storage Node IEEE Transactions on Electron Devices 58 2 288-295 Feb. 2011
37 Seongjae Cho, Kyung Rok Kim, Byung-Gook Park, and In Man Kang Compact modeling of silicon nanowire MOSFET for radio frequency application Microwave and Optical Technology Letters 53 2 471-473 Feb. 2011
36 Wandong Kim, Jung Hoon Lee, Jang-Gn Yun, Seongjae Cho, Dong Hua Li, Yoon Kim, Doo-Hyun Kim, Gil Sung Lee, Se Hwan Park, Won Bo Shim, Jung-Ho Lee, Hyungcheol Shin, and Byung-Gook Park Arch NAND Flash Memory Array with Improved Virtual Source/Drain Performance IEEE Electron Device Letters 31 12 1374-1376 Dec. 2010
35 Seongjae Cho, Shinichi O'uchi, Kazuhiko Endo, Sang Wan Kim, Younghwan Son, In Man Kang, Meishoku Masahara, James S. Harris, Jr., and Byung-Gook Park Rigorous Design of 22-nm Node 4-Terminal SOI FinFETs for Reliable Low Standby Power Operation with Semi-empirical Parameters Journal of Semiconductor Technology and Science 10 4 265-275 Dec. 2010
34 Jung Hoon Lee, Gil Sung Lee, Seongjae Cho, Jang-Gn Yun, and Byung-Gook Park Investigation of Field Concentration Effects in Arch Gate Silicon-Oxide-Nitride-Oxide-Silicon Flash Memory Japanese Journal of Applied Physics 49 11 1142021-1142026 Nov. 2010
33 Seongjae Cho, Kyung Rok Kim, Byung-Gook Park, and In Man Kang Non-Quasi-Static Modeling of Silicon Nanowire Metal-Oxide-Semiconductor Field-Effect Transistor and Its Model Verification up to 1 THz Japanese Journal of Applied Physics 49 11 1102061-1102063 Nov. 2010
32 Seongjae Cho, Kyung Rok Kim, Byung-Gook Park, and In Man Kang Optimum Design of Junctionless MOSFET Based on Silicon Nanowire Structure and Analysis on Basic RF Characteristics Journal of Institute of Electronics Engineers of Korea: Semiconductor Devices 47 10 14-22 Oct. 2010
31 Seongjae Cho, In Man Kang, and Kyung Rok Kim Investigation of source-to-drain capacitance by DIBL effect of silicon nanowire MOSFETs IEICE Electronics Express 7 19 1499-1503 Oct. 2010
30 Seongjae Cho, Jung Hoon Lee, Shinichi O'uchi, Kazuhiko Endo, Meishoku Masahara, and Byung-Gook Park Design of SOI FinFET on 32 nm technology node for low standby power (LSTP) operation considering gate-induced drain leakage (GIDL) Solid-State Electronics 54 10 1060-1065 Oct. 2010
29 Doo-Hyun Kim, Seongjae Cho, Dong Hua Li, Jang-Gn Yun, Jung Hoon Lee, Gil Sung Lee, Yoon Kim, Won Bo Shim, Se Hwan Park, Wandong Kim, Hyungcheol Shin, and Byung-Gook Park Program/Erase Model of Nitride-Based NAND-Type Charge Trap Flash Memories Japanese Journal of Applied Physics 49 8 843011-843014 Aug. 2010
28 Seongjae Cho, Jung-Dal Choi, Byung-Gook Park, and Il Hwan Cho Effects of channel doping concentration and fin dimension variation on self-boosting of channel potential in NAND-type SONOS flash memory array based on bulk-FinFETs Current Applied Physics 10 4 1096-1102 Jul. 2010
27 Seongjae Cho, Jung Hoon Lee, Yoon Kim, Jang Gn Yun, Hyungcheol Shin, and Byung-Gook Park Simulation Study on Dependence of Channel Potential Self-Boosting on Device Scale and Doping Concentration in 2-D and 3-D NAND-Type Flash Memory Devices IEICE Transactions on Electronics E93-C 5 596-601 May 2010
26 Dong Seup Lee, Hong-Seon Yang, Kwon-Chil Kang, Joung-Eob Lee, Jung Han Lee, Seongjae Cho, and Byung-Gook Park Simulation of Gate-All-Around Tunnel Field-Effect Transistor with an n-Doped Layer IEICE Transactions on Electronics E93-C 5 540-545 May 2010
25 Seongjae Cho, Hee-Sauk Jhon, Jung Hoon Lee, Se Hwan Park, Hyungcheol Shin, and Byung-Gook Park Device and Circuit Co-Design Strategy for Application to Low Noise Amplifier (LNA) Based on Silicon Nanowire MOSFETs Japanese Journal of Applied Physics 49 4 04DN03-1-04DN03-7 Apr. 2010
24 Yoon Kim, Jang-Gn Yun, Seongjae Cho, and Byung-Gook Park Highly Integrated 3-dimensional NOR Flash Array with Vertical 4-bit SONOS (V4SONOS) Journal of Institute of Electronics Engineers of Korea: Semiconductor Devices 47 2 102-107 Feb. 2010
23 Seongjae Cho, Shinichi O'uchi, Kazuhiko Endo, Takashi Matsukawa, Kunihiro Sakamoto, Yongxun Liu, Byung-Gook Park, and Meishoku Masahara Minimization of Gate-Induced Drain Leakage by Controlling Gate Underlap Length for Low-Standby-Power Operation of 20-nm-Level Four-Terminal Silicon-on-Insulator Fin-Shaped Field Effect Transistor Japanese Journal of Applied Physics 49 2 024203-1-024203-5 Feb. 2010
22 Yoon Kim, Il Han Park, Seongjae Cho, Jang-Gn Tun, Jung Hoon Lee, Doo-Hyun Kim, Gil Sung Lee, Se-Hwan Park, Dong Hua Lee, Won Bo Shim, Wandong Kim, Hyungcheol Shin, Jong Duk Lee, and Byung-Gook Park A Vertical 4-Bit SONOS Flash Memory and a Unique 3-D Vertical NOR Array Structure IEEE Transactions on Nanotechnology 9 1 70-76 Jan. 2010
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