| 6 |
Jong Pil Kim, Woo Young Choi, Jae Young Song, Seongjae Cho, Sang Wan Kim, Jong Duk Lee, and Byung-Gook Park |
Design and Simulation of Asymmetric MOSFETs |
IEICE Transactions on Electronics |
E90-C |
5 |
978-982 |
May 2007 |
| 5 |
Hochul Lee, Youngchang Yoon, Seongjae Cho, and Hyungcheol Shin |
Accurate extraction of the trap depth from RTS noise data by including poly depletion effect and surface potential variation in MOSFETs |
IEICE Transactions on Electronics |
E90-C |
5 |
968-971 |
May 2007 |
| 4 |
Seongjae Cho, Jang-Gn Yun, Il Han Park, Jung Hun Lee, Jong Pil Kim, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park |
Analyses on Current Characteristics of 3-D MOSFET Determined by Junction Doping Profiles for Nonvolatile Memory Devices |
IEICE Transactions on Electronics |
E90-C |
5 |
988-993 |
May 2007 |
| 3 |
Seongjae Cho, Il Han Park, Tae Hun Kim, Jung Hoon Lee, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park |
Quantitative Analysis on Voltage Schemes for Reliable Operations of a Floating Gate Type Double Gate Nonvolatile Memory Cell |
Journal of Semiconductor Technology and Science |
5 |
3 |
195-203 |
Sep. 2005 |
| 2 |
Seongjae Cho, Il Han Park, Tae Hun Kim, Jae Sung Sim, Ki-Whan Song, Jong Duk Lee, Hyungcheol Shin, and Byung-Gook Park |
Design and Optimization of Two-Bit Double-Gate Nonvolatile Memory Cell for Highly Reliable Operations |
IEEE Transactions on Nanotechnology |
5 |
3 |
180-185 |
May 2006 |
| 1 |
Il Han Park, Tae Hun Kim, Seongjae Cho, Jung Hoon Lee, Jong Duk Lee, and Byung-Gook Park |
Depletion-Enhanced Body-Isolation (DEBI) Array on SOI for Highly Scalable and Reliable NAND Flash Memories |
IEEE Transactions on Nanotechnology |
5 |
3 |
201-204 |
May 2006 |
Gachon University